Multichip circuit module and method for the production thereof

ABSTRACT

A multichip circuit module includes a main board, at least one carrier substrate mounted on and in electrical contact with the main board, and at least one semiconductor chip arranged on the carrier substrate and in electrical contact therewith. The carrier substrate has at least one cavity on an assembly surface for receiving the semiconductor chip. The cavity includes connecting contacts which join with associated bumps on the semiconductor chip using a flip-chip technique. The assembly surface of the carrier substrate is placed on a contact surface of the main board, and a filling material is provided between the contract surface of the main board and the assembly surface of the carrier substrate.

The invention relates to a multichip circuit module having a maincircuit board, at least one carrier substrate which is mounted on themain circuit board and which is in electrical contact with the maincircuit board, and at least one semiconductor chip on the carriersubstrate which is in electrical contact with the carrier substrate,

-   -   the carrier substrate having at least one cavity on a mounting        surface to accommodate at least one semiconductor chip,    -   connecting contacts for associated bumps of the semiconductor        chip being provided in the cavity,    -   the at least one semiconductor chip being mounted on the        connecting contacts by using the bumps in the flip-chip        technique,    -   the mounting surface of the carrier substrate being applied to a        contact surface of the main circuit board, a filling material        being provided between the contact surface of the main circuit        board and the mounting surface of the carrier substrate.

The invention further relates to a method for the production of suchmultichip circuit modules.

Multichip circuit modules are sufficiently well known, for example fromDE 100 11 005 A1 and DE 100 41 770 A1. Primarily, high-frequencycircuits in the frequency range up to 100 GHz are implemented in theform of such multichip circuit modules. The multichip circuit modules inthis case comprise a carrier substrate, on which individualsemiconductor chips are mounted by wire-bonding or flip-chip technology.Suitable semiconductor chips car be, for example, millimeter wavemonolithic integrated circuits MMIC. The carrier substrate can also havepassive circuit components, for example on the surface or in lowerlevels of the carrier substrate. For the high-frequency use, the carriersubstrate can be, for example, a multilayer ceramic, such aslow-temperature co-fired ceramics LTCC.

The carrier substrates having the passive and active circuit componentsin turn form submodules, which are combined on a further substrate, themain circuit board. The submodules are in electrical contact with themain circuit board and thus also with one another.

In order to make contact between the carrier substrates and the maincircuit board, for example the ball-grid array BGA connecting techniqueis known from DE 199 31 004 A1.

The multichip circuit module is subsequently encapsulated withdielectric filling materials, as disclosed in DE 101 16 510 A1, orshielded with a metal housing, as described in DE 100 59 688 A1.

In EP 0 900 477 B1, an electronic component having surface wave filtersis described, in which a carrier substrate is mounted on a main circuitboard in the flip-chip technique. A metallic protective layer is applieddirectly to the side of the carrier substrate facing away from theconnecting region between carrier substrate and main circuit board, asfar as the main circuit board, so that there is a tight closure withrespect to the main circuit board.

The flip-chip technique for making electrical contact betweensemiconductor chips and a carrier substrate or between a carriersubstrate and a main circuit board with the aid of bumps which areconnected to connecting contacts is described, for example, in DE 100 41695 A1, DE 100 43 450 A1 and DE 100 29 255 A1.

In order to shield the multichip circuit modules, additional operationsare disadvantageously required.

In DE 196 40 192 A1, the method for the bump-free flip-chip mounting ofintegrated circuits on a substrate by using anisotropically conductiveadhesives is described, which describes solder particles for themetallurgical connection between integrated circuit and substrate.

JP 2003174141 A1 discloses a multichip circuit module in which asemiconductor chip is connected to bumps which, on a level of a carriersubstrate, are led to connecting contacts in cavities of the carriersubstrate. The mounting surface of the carrier substrate is connected tothe contact surface of a main circuit board by filling material lying inbetween, so that the semiconductor chip is encapsulated. Electricalcontact between the carrier substrate and the main circuit board is madevia the cavities.

It is an object of the invention to provide an improved multichipcircuit module with a more compact structure which is less expensiveand, at the same time, more highly integrated.

It is also an object of the invention to provide an improved method forthe production of such a multichip circuit module.

According to the invention, the object is achieved with the genericmultichip circuit module in that the carrier substrate has many layerswith connecting lines extending transversely through a plurality oflayers. The multilayer structuring of the carrier substrate ispreferably used exclusively for the passive integration of the multichipcircuit module, for example for wiring arrangements, filters and biasnetworks.

The object is further achieved with the generic method, according to theinvention, by means of the following steps:

-   -   a) letting the at least one semiconductor chip into cavities        provided for the semiconductor chips on a mounting surface of        the carrier substrate;    -   b) mounting the at least one semiconductor chip in the flip-chip        technique by making contact with bumps of the semiconductor        chips resting on connecting contacts in the cavities;    -   c) applying a layer of filling material to the contact surface        of the main circuit board; and    -   d) applying the carrier substrate having the mounting surface to        the contact surface of the main circuit board.

In comparison with the conventional production methods of multichipcircuit modules, the number of operations in the assembly and connectingtechnique is reduced by using standard technologies. The multichipcircuit module may therefore be produced relatively inexpensively and,on account of the cavities, has a more highly integrated, more compactstructure.

The filling material is preferably an anisotropically conductivematerial, such as an anisotropically conductive paste or ananisotropically conductive film. Using these, it is not justencapsulation and shielding of the multichip circuit module which isimplemented. Instead, additionally all the connections between thecarrier substrate and the main circuit board are made in the sameoperation. As a result of the anisotropic character of the fillingmaterial, the insulation of adjacent lines is ensured.

In this case, the filling material conducts in the direction of theapplication height, that is to say in the direction from the maincircuit board to the carrier substrate. In the surface, on the otherhand, the anisotropic filling material is insulating.

The filling material is not intended to fill the interspaces of thecavities completely, in order to prevent wetting of the surface of thesemiconductor chip and of the bumps with filling material, so that achange in the electrical properties is avoided as far as possible.

The invention will be explained in more detail below by way of example,using the appended drawings, in which:

FIG. 1 shows a sketch of a carrier substrate having semiconductor chipsin a cross-sectional view;

FIG. 2 shows a sketch of the carrier substrate with electricallycontacted semiconductor chips rotated through 180° in order to be placedon a main circuit board, in a cross-sectional view;

FIG. 3 shows a sketch of a multichip circuit module with carriersubstrate placed on the main circuit board in a cross-sectional view.

FIG. 1 reveals a sketch of a multilayer carrier substrate 1 which has alarge number of conductor tracks 2. Provided on a mounting surface 3 ofthe carrier substrate 1 are cavities 4 in the form of rectangularrecesses, into which semiconductor chips 5 can be inserted. Provided inthe cavities 4 are corresponding connecting contacts 6 for bumps 7 onthe underside of the semiconductor chips 5. With the aid of the bumps 7and the connecting contacts 6, electrical contact can be made with thesemiconductor chips 5 in the cavities 4 by the known flip-chiptechnique. As a cost-effective implementation of multilayer carriersubstrates 1, in particular in conjunction with the production ofcavities 4, the LTCC (low-temperature co-fired ceramics) technology isrecommended.

Provided on the underside of the carrier substrate 1, which is oppositethe mounting surface 3, is a planar antenna arrangement 8, for example apatch antenna. Such a design is now possible, since the carriersubstrate 1 can be mounted with the mounting surface 3 on a main circuitboard.

The vertical conductor tracks 2 are connecting lines for HF and DCsignals which extend transversely through a plurality of layers of thecarrier substrate 1. The conductor tracks 2 can, for example, compriseat least one conductor and, if appropriate, at least one additionalshielding leadthrough. The vertical wiring arrangement can also beimplemented in hollow-conductor technology, the vertical plated-throughcontacts forming the conductive walls of a hollow conductor.

FIG. 2 reveals the method step of joining the carrier substrate 1, whichis rotated through 180° in relation to the carrier substrate 1illustrated in FIG. 1, to a main circuit board 9.

Applied to the contact surface 10 of the main circuit board 9 is afilling material 11 in the form of an anisotropically conductive film,an anisotropically conductive paste or an isotropically conductiveadhesive layer.

The carrier substrate 1 is then pressed with the mounting surface 3 ontothe contact surface 10 having the filling material 11. In the process,the semiconductor chips 5 have already had electrical contact made withthe carrier substrate 1 in the flip-chip technique. The conductor tracks2 for making electrical contact with the semiconductor chips are ledthrough the multilayer carrier substrate 1 to the mounting surface 3 andare electrically connected to corresponding conductor tracks 12 in themain circuit board 9 when the carrier substrate 1 is bonded to the maincircuit board 9 by the filling material 11.

FIG. 3 reveals a corresponding finished multichip circuit module withcarrier substrate 1 and main circuit board 9 in the joined state. As aresult of the use of anisotropically conductive filling material 11,which is conductive in the direction of the layer thickness of thefilling material 11, that is to say in the direction from carriersubstrate 1 to the main circuit board 9, and is insulating in thedirection of the area of the filling material 11, an electricalconnection between the conductor tracks 2 and 12 is automaticallyproduced. In the case of isotropically conductive filling material,conductor tracks 2, 12 on the mounting surface 3 are short-circuited, sothat no wiring arrangement should be provided on the mounting surface 3.Encapsulation and heat dissipation are still provided, however.

As a result of the way in which the carrier substrate 1 is fixed to themain circuit board 9 with the mounting surface 3 containing thesemiconductor chips 5, which in reversed as compared with conventionalmultichip circuit modules, encapsulation is achieved in one operation,although this has no influence on the high-frequency property of themultichip circuit module. In addition, the heat loss produced in thesemiconductor chips 5 is carried away directly to the main circuit board9, so that additional space-consuming plated-through contacts for thedissipation of heat loss are not necessary.

By choosing the layer thickness of the filling material 11 in such a waythat, when the carrier substrate 1 is set down by standard positioningdevices, complete filling of the interspaces of the cavities 4 isavoided, sealing of the semiconductor chips can be achieved without thechip surface with bumps 7 and filling material 11 being wetted.Following the final curing of the filling material 11, permanent,fault-free encapsulation and shielding are ensured.

The main circuit board 9 can be a single-layer or multilayer substratematerial or a metal plate, depending on the choice of filling material11 and the desired application.

If only fault-free encapsulation and good thermal dissipation are to beachieved, a metal plate is recommended. For more complex arrangements,the main circuit board 9 can likewise be any desired combination ofmultilayer substrate and, if appropriate, structured metal plate.

By producing the multichip circuit module in a suitable atmosphere, itis possible not only for air but any desired (protective) gas to beenclosed in the cavities 4.

1. A multichip circuit module having a main circuit board, at least onecarrier substrate mounted on the main circuit board and which is inelectrical contact with the main circuit board, and at least onesemiconductor chip on the carrier substrate which is in electricalcontact with the carrier substrate, wherein the carrier substrate has atleast one cavity on a mounting surface to accommodate said at least onesemiconductor chip, connecting contacts for associated bumps of said atleast one semiconductor chip are provided in said at least one cavity,the at least one semiconductor chip being mounted on the connectingcontacts by using the associated bumps in a flip-chip technique, and themounting surface of the carrier substrate being applied to a contactsurface of the main circuit board and the mounting surface of thecarrier substrate, wherein the carrier substrate has many layers withconductor tracks extending transversely through a plurality of layers,and a filling material makes contact with a rear of said at least onesemiconductor chip in said at least one cavity without enclosing theconnecting contacts and bumps.
 2. The multichip circuit module asclaimed in claim 1, wherein the filling material is an anisotropicallyconductive material.
 3. The multichip circuit module as claimed in claim1, wherein the filling material does not fill the interspaces of the atleast one cavity completely.
 4. The multichip circuit module as claimedin claim 1 wherein, the conductor tracks of the carrier substrate areled to the mounting surface and are connected electrically andmechanically to conductor tracks of the main circuit board for thesimultaneous carrying of signals, dissipation of heat, encapsulation andshielding.
 5. The multichip circuit module as claimed in claim 1 furthercomprising, a planar antenna arrangement on an underside of the carriersubstrate, which is opposite the mounting surface.
 6. The multichipcircuit module as claimed in claim 1 wherein the carrier substrate is amultilayer ceramic.
 7. A method for production of multichip circuitmodules having a main circuit board, at least one carrier substratemounted on the main circuit board and which is in electrical contactwith the main circuit board, and at least one semiconductor chip on thecarrier substrate which is in electrical contact with the carriersubstrate, wherein the carrier substrate has at least one cavity on amounting surface to accommodate said at least one semiconductor chip,connecting contacts for associated bumps of said at least onesemiconductor chip are provided in said at least one cavity, the atleast one semiconductor chip being mounted on the connecting contacts byusing the associated bumps in a flip-chip technique, and the mountingsurface of the carrier substrate being applied to a contact surface ofthe main circuit board and the mounting surface of the carrier substratewherein the carrier substrate has many layers with conductor tracksextending transversely through a plurality of layers, and a fillingmaterial makes contact with a rear of said at least one semiconductorchip in said at least one cavity without enclosing the connectingcontacts and bumps, having the following steps: a) letting the at leastone semiconductor chip into cavities provided for semiconductor chips ona mounting surface of the carrier substrate; b) mounting the at leastone semiconductor chip by making contact with the bumps of the at leastone semiconductor chip to connecting contacts in the cavities using aflip-chip technique; c) applying a layer of filling material to thecontact surface of the main circuit board; and d) applying the carriersubstrate having the mounting surface to the contact surface of the maincircuit board.
 8. The method as claimed in claim 7 wherein said applyinga layer of filling material step is performed by application of ananisotropically conductive filling material, to the contact surface. 9.The method as claimed in claim 7 wherein said applying a layer offilling material step includes application of the filling material in alayer thickness which is matched in such a way that interspaces of thecavities are not filled completely with the filling material.
 10. Themethod as claimed in claim 7 further comprising the step of electricallyconnecting the conductor tracks, which extend transversely through aplurality of layers of the carrier substrate and are led to the mountingsurface to conductor tracks of the main circuit board.
 11. The method asclaimed in claim 7 wherein the steps are performed in a gas atmospherein order to enclose gas in the cavities.
 12. The multichip circuitmodule of claim 2 wherein said anisotropically conductive material isselected from the group consisting of an anisotropically conductivepaste and an anisotropically conductive film.
 13. The multichip circuitmodule as claimed in claim 2 wherein the filling material does not fillthe interspaces of the at least one cavity completely.
 14. The multichipcircuit module as claimed in claim 6 wherein said multilayer ceramic isa low-temperature co-fired ceramic (LTCC).
 15. The method as claimed inclaim 7 wherein said anisotropically conductive filling material is apaste or a film.
 16. The method as claimed in claim 8 wherein saidapplying a layer of filling material step includes application of thefilling material in a layer thickness which is matched in such a waythat interspaces of the cavities are not filled completely with thefilling material.
 17. The method as claimed in claim 8 wherein the stepsare performed in a gas atmosphere in order to enclose gas in thecavities.
 18. The method as claimed in claim 9 wherein the steps areperformed in a gas atmosphere in order to enclose gas in the cavities.19. The method as claimed in claim 10 wherein the steps are performed ina gas atmosphere in order to enclose gas in the cavities.